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  1. 052cbf4 Revert "Peg the CPU at the lowest clock rate (350MHz)." by Charles M. Hannum · 10 years ago master ara-dev-release-20141107
  2. c4e5a2d Set gpio_wk4 to an input, so it doesn't hose SDIO DAT1. by Charles M. Hannum · 10 years ago
  3. d50c673 Don't enable VAUX1 on the form factor—it causes the PMIC to abort. by Charles M. Hannum · 10 years ago
  4. 2341822 Fix WiFi REFCLK frequency. by Charles M. Hannum · 10 years ago
  5. 08a0b6a Change WIFI_IRQ pin. by Charles M. Hannum · 10 years ago
  6. d8d72f9 Revert HDMI polarity for rev C. by Charles M. Hannum · 10 years ago
  7. e5649a2 Set up GPIO 166 for WIFI_IRQ. by Charles M. Hannum · 10 years ago
  8. 1140769 Increase MMC_CMD_RETRIES, to deal with timing differences when not running by Charles M. Hannum · 10 years ago
  9. 578a8ee Remove some dead code. by Charles M. Hannum · 10 years ago
  10. cf5c010 Make TE pulses much longer. by Charles M. Hannum · 10 years ago
  11. d1fd534 Fix some display reliability problems. by Charles M. Hannum · 10 years ago
  12. e134bb2 Disable ioctls that require BTAs. by Charles M. Hannum · 10 years ago
  13. 67af06e Reenable display codec, but on correct I2C bus. by Charles M. Hannum · 10 years ago
  14. fcc717b6 Run both the OMAP and the codec as clock masters. by Charles M. Hannum · 10 years ago
  15. f002caa Swap the codec slave addresses. by Charles M. Hannum · 10 years ago
  16. 0ae6637 Remove OCR hack, not that we're using timeouts instead of bogus responses. by Charles M. Hannum · 10 years ago
  17. c288408 Peg the CPU at the lowest clock rate (350MHz). by Charles M. Hannum · 10 years ago
  18. 0955c74 The reset protocol is just broken, and cannot work reliably. So for now just by Charles M. Hannum · 10 years ago
  19. afd9e69 Block interrupts inside omap_hsmmc_controll_reset_fsm(). by Charles M. Hannum · 10 years ago
  20. c556681 Retry data transfers on command errors. by Charles M. Hannum · 10 years ago