blob: bf7a6f6be69cf8bebaa79e137b77a93ffc871f82 [file] [log] [blame]
/*
* Copyright 2009 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/fsl_ifc.h>
#include <asm/io.h>
void cpu_init_f(void)
{
#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
/* set MBECCDIS=1, SBECCDIS=1 */
out_be32(&l2cache->l2errdis,
(MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC));
/* set L2E=1 & L2SRAM=001 */
out_be32(&l2cache->l2ctl,
(MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
#endif
}