commit 9973e3c614721bbf169882ffc3be266a6611cd60
author Becky Bruce <becky.bruce@freescale.com> Mon Jun 09 16:03:40 2008 -0500
committer Wolfgang Denk <wd@denx.de> Thu Jun 12 08:50:18 2008 +0200
tree 01ca6844089d2ea999566aa558acea50a9e606a1
parent 391fd93ab23e15ab3dd58a54f5b609024009c378

Change initdram() return type to phys_size_t

This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>

cpu/ppc4xx/44x_spd_ddr2.c

diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index 5214918..c28fc46 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -389,7 +389,7 @@
  *		 banks appropriately. If Auto Memory Configuration is
  *		 not used, it is assumed that no DIMM is plugged
  *-----------------------------------------------------------------------------*/
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
 	unsigned char iic0_dimm_addr[] = SPD_EEPROM_ADDRESS;
 	unsigned char spd0[MAX_SPD_BYTES];
@@ -3081,7 +3081,7 @@
  * 		banks. The configuration is performed using static, compile-
  *		time parameters.
  *---------------------------------------------------------------------------*/
-long initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
 	/*
 	 * Only run this SDRAM init code once. For NAND booting

cpu/ppc4xx/denali_spd_ddr2.c

diff --git a/cpu/ppc4xx/denali_spd_ddr2.c b/cpu/ppc4xx/denali_spd_ddr2.c
index ad805b9..3bd6375 100644
--- a/cpu/ppc4xx/denali_spd_ddr2.c
+++ b/cpu/ppc4xx/denali_spd_ddr2.c
@@ -1022,7 +1022,7 @@
  *		 banks appropriately. If Auto Memory Configuration is
  *		 not used, it is assumed that no DIMM is plugged
  *-----------------------------------------------------------------------------*/
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
 	unsigned char const iic0_dimm_addr[] = SPD_EEPROM_ADDRESS;
 	unsigned long dimm_ranks[MAXDIMMS];

cpu/ppc4xx/sdram.c

diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c
index c7771ad..7d60ad6 100644
--- a/cpu/ppc4xx/sdram.c
+++ b/cpu/ppc4xx/sdram.c
@@ -164,7 +164,7 @@
 /*
  * Autodetect onboard SDRAM on 405 platforms
  */
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
 	ulong speed;
 	ulong sdtr1;
@@ -346,7 +346,7 @@
  *	 so this should be extended for other future boards
  *	 using this routine!
  */
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
 {
 	int i;
 	int tr1_bank1;