| /* |
| * linux/arch/arm/kernel/head-nommu.S |
| * |
| * Copyright (C) 1994-2002 Russell King |
| * Copyright (C) 2003-2006 Hyok S. Choi |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| * |
| * Common kernel startup code (non-paged MM) |
| * for 32-bit CPUs which has a process ID register(CP15). |
| * |
| */ |
| #include <linux/linkage.h> |
| #include <linux/init.h> |
| |
| #include <asm/assembler.h> |
| #include <asm/mach-types.h> |
| #include <asm/procinfo.h> |
| #include <asm/ptrace.h> |
| #include <asm/asm-offsets.h> |
| #include <asm/thread_info.h> |
| #include <asm/system.h> |
| |
| /* |
| * Kernel startup entry point. |
| * --------------------------- |
| * |
| * This is normally called from the decompressor code. The requirements |
| * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0, |
| * r1 = machine nr. |
| * |
| * See linux/arch/arm/tools/mach-types for the complete list of machine |
| * numbers for r1. |
| * |
| */ |
| __INIT |
| .type stext, %function |
| ENTRY(stext) |
| msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode |
| @ and irqs disabled |
| mrc p15, 0, r9, c0, c0 @ get processor id |
| bl __lookup_processor_type @ r5=procinfo r9=cpuid |
| movs r10, r5 @ invalid processor (r5=0)? |
| beq __error_p @ yes, error 'p' |
| bl __lookup_machine_type @ r5=machinfo |
| movs r8, r5 @ invalid machine (r5=0)? |
| beq __error_a @ yes, error 'a' |
| |
| ldr r13, __switch_data @ address to jump to after |
| @ the initialization is done |
| adr lr, __after_proc_init @ return (PIC) address |
| add pc, r10, #PROCINFO_INITFUNC |
| |
| /* |
| * Set the Control Register and Read the process ID. |
| */ |
| .type __after_proc_init, %function |
| __after_proc_init: |
| mrc p15, 0, r0, c1, c0, 0 @ read control reg |
| #ifdef CONFIG_ALIGNMENT_TRAP |
| orr r0, r0, #CR_A |
| #else |
| bic r0, r0, #CR_A |
| #endif |
| #ifdef CONFIG_CPU_DCACHE_DISABLE |
| bic r0, r0, #CR_C |
| #endif |
| #ifdef CONFIG_CPU_BPREDICT_DISABLE |
| bic r0, r0, #CR_Z |
| #endif |
| #ifdef CONFIG_CPU_ICACHE_DISABLE |
| bic r0, r0, #CR_I |
| #endif |
| mcr p15, 0, r0, c1, c0, 0 @ write control reg |
| |
| mov pc, r13 @ clear the BSS and jump |
| @ to start_kernel |
| .ltorg |
| |
| #include "head-common.S" |
