arch/tile: rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN
See commit a6eb9fe105d5de0053b261148cee56c94b4720ca.
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
diff --git a/arch/tile/include/asm/cache.h b/arch/tile/include/asm/cache.h
index f610184..08a2815 100644
--- a/arch/tile/include/asm/cache.h
+++ b/arch/tile/include/asm/cache.h
@@ -27,11 +27,10 @@
#define L2_CACHE_ALIGN(x) (((x)+(L2_CACHE_BYTES-1)) & -L2_CACHE_BYTES)
/*
- * TILE-Gx is fully coherents so we don't need to define
- * ARCH_KMALLOC_MINALIGN.
+ * TILE-Gx is fully coherent so we don't need to define ARCH_DMA_MINALIGN.
*/
#ifndef __tilegx__
-#define ARCH_KMALLOC_MINALIGN L2_CACHE_BYTES
+#define ARCH_DMA_MINALIGN L2_CACHE_BYTES
#endif
/* use the cache line size for the L2, which is where it counts */
