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llvm
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dad145562fe15d0d2195f8e94baa1a74bf34e6e1
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.
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test
/
Transforms
/
InstCombine
/
2007-01-18-VectorInfLoop.ll
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; RUN: opt < %s -instcombine -disable-output
define
<
4
x
i32
>
@test
(<
4
x
i32
>
%A
)
{
%B
=
xor
<
4
x
i32
>
%A
,
<
i32
-
1
,
i32
-
1
,
i32
-
1
,
i32
-
1
>
%C
=
and
<
4
x
i32
>
%B
,
<
i32
-
1
,
i32
-
1
,
i32
-
1
,
i32
-
1
>
ret
<
4
x
i32
>
%C
}