diff --git a/Makefile.android b/Makefile.android
index 00faa1c..195c061 100644
--- a/Makefile.android
+++ b/Makefile.android
@@ -1,12 +1,16 @@
-ifneq (,$(filter $(TARGET_ARCH),arm x86))
+ifneq (,$(filter $(TARGET_ARCH),arm x86 mips))
 LOCAL_PATH:= $(call my-dir)
 
 # determine the target cpu
 ifeq ($(TARGET_ARCH),arm)
 EMULATOR_TARGET_CPU := target-arm
-else
+endif
+ifeq ($(TARGET_ARCH),x86)
 EMULATOR_TARGET_CPU := target-i386
 endif
+ifeq ($(TARGET_ARCH),mips)
+EMULATOR_TARGET_CPU := target-mips
+endif
 
 # determine the host tag to use
 QEMU_HOST_TAG := $(HOST_PREBUILT_TAG)
@@ -253,6 +257,9 @@
 EMULATOR_TARGET_ARCH := x86
 include $(LOCAL_PATH)/Makefile.target
 
+EMULATOR_TARGET_ARCH := mips
+include $(LOCAL_PATH)/Makefile.target
+
 ##############################################################################
 ##############################################################################
 ###
@@ -316,4 +323,4 @@
 
 ## VOILA!!
 
-endif  # TARGET_ARCH == arm || TARGET_ARCH == x86
+endif  # TARGET_ARCH == arm || TARGET_ARCH == x86 || TARGET_ARCH == mips
diff --git a/Makefile.target b/Makefile.target
index 5b4ec5f..608761c 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -1,6 +1,6 @@
 # This file is included several times to build target-specific
 # modules for the Android emulator. It will be called several times
-# (e.g. once for the arm target, and once for the x86 target).
+# for arm, x86 and mips
 #
 
 ifndef EMULATOR_TARGET_ARCH
@@ -26,7 +26,7 @@
     -I$(LOCAL_PATH)/android/config/target-$(EMULATOR_TARGET_ARCH) \
     -I$(LOCAL_PATH)/target-$(EMULATOR_TARGET_CPU) \
     -I$(LOCAL_PATH)/fpu \
-    -DNEED_CPU_H \
+    -DNEED_CPU_H
 
 TCG_TARGET := $(HOST_ARCH)
 ifeq ($(HOST_ARCH),x86)
@@ -96,7 +96,7 @@
     goldfish_switch.c \
     goldfish_timer.c \
     goldfish_trace.c \
-    arm_boot.c \
+    arm_boot.c
 
 # The following sources must be compiled with the final executables
 # because they contain device_init() or machine_init() statements.
@@ -135,6 +135,31 @@
 
 endif
 
+ifeq ($(EMULATOR_TARGET_ARCH),mips)
+HW_SOURCES += \
+    android_mips.c \
+    mips_pic.c \
+    goldfish_interrupt.c \
+    goldfish_switch.c \
+    goldfish_timer.c \
+    goldfish_trace.c \
+    mips_timer.c \
+    mips_int.c
+
+# The following sources must be compiled with the final executables
+# because they contain device_init() or machine_init() statements.
+HW_OBJ_SOURCES := hw/smc91c111.c
+HW_OBJ_CFLAGS  := $(EMULATOR_TARGET_CFLAGS)
+
+common_LOCAL_SRC_FILES += mips-dis.c
+
+# smc91c111.c requires <zlib.h>
+LOCAL_CFLAGS += $(ZLIB_CFLAGS)
+ifeq ($(ARCH_HAS_BIGENDIAN),true)
+  LOCAL_CFLAGS += -DTARGET_WORDS_BIGENDIAN
+endif
+
+endif
 common_LOCAL_SRC_FILES += $(HW_SOURCES:%=hw/%)
 
 common_LOCAL_SRC_FILES += \
@@ -143,7 +168,7 @@
     translate-all.c \
     trace.c \
     varint.c \
-    softmmu_outside_jit.c \
+    softmmu_outside_jit.c
 
 ##############################################################################
 # CPU-specific emulation.
@@ -165,7 +190,7 @@
     target-arm/machine.c \
     hw/armv7m.c \
     hw/armv7m_nvic.c \
-    arm-semi.c \
+    arm-semi.c
 
 common_LOCAL_SRC_FILES += fpu/softfloat.c
 endif
@@ -192,6 +217,16 @@
 common_LOCAL_SRC_FILES += fpu/softfloat-native.c
 endif
 
+ifeq ($(EMULATOR_TARGET_ARCH), mips)
+common_LOCAL_SRC_FILES += \
+    target-mips/op_helper.c \
+    target-mips/helper.c \
+    target-mips/translate.c \
+    target-mips/machine.c
+
+common_LOCAL_SRC_FILES += fpu/softfloat.c
+endif
+
 # compile KVM only if target is x86 on x86 Linux
 QEMU_KVM_TAG := $(QEMU_HOST_TAG)-$(EMULATOR_TARGET_ARCH)
 QEMU_DO_KVM := $(if $(filter linux-x86-x86 linux-x86_64-x86,$(QEMU_KVM_TAG)),true,false)
@@ -220,7 +255,7 @@
     memcheck_proc_management.c \
     memcheck_malloc_map.c \
     memcheck_mmrange_map.c \
-    memcheck_util.c \
+    memcheck_util.c
 
 common_LOCAL_SRC_FILES += $(MCHK_SOURCES:%=memcheck/%)
 
@@ -272,7 +307,7 @@
     $(ELFF_CFLAGS) \
     $(EMULATOR_LIBQEMU_CFLAGS) \
     $(EMULATOR_TARGET_CFLAGS) \
-    -DCONFIG_STANDALONE_CORE \
+    -DCONFIG_STANDALONE_CORE
 
 ifneq ($(QEMU_OPENGLES_INCLUDE),)
     LOCAL_CFLAGS += -I$(QEMU_OPENGLES_INCLUDE)
@@ -284,13 +319,12 @@
     emulator-libqemu \
     emulator-target-$(EMULATOR_TARGET_CPU) \
     emulator-libelff \
-    emulator-common \
-
+    emulator-common
 
 LOCAL_LDLIBS += \
     $(EMULATOR_COMMON_LDLIBS) \
     $(EMULATOR_LIBQEMU_LDLIBS) \
-    $(ELFF_LDLIBS) \
+    $(ELFF_LDLIBS)
 
 LOCAL_SRC_FILES := \
     audio/audio.c \
@@ -312,7 +346,7 @@
     android/protocol/user-events-impl.c \
     android/protocol/ui-commands-proxy.c \
     android/protocol/core-commands-impl.c \
-    android/protocol/core-commands-qemu.c \
+    android/protocol/core-commands-qemu.c
 
 $(call gen-hx-header,qemu-monitor.hx,qemu-monitor.h,monitor.c)
 $(call gen-hx-header,qemu-options.hx,qemu-options.def,vl-android.c qemu-options.h)
@@ -360,13 +394,13 @@
     emulator-libqemu \
     emulator-target-$(EMULATOR_TARGET_CPU) \
     emulator-libelff \
-    emulator-common \
+    emulator-common
 
 common_LOCAL_LDLIBS += \
     $(EMULATOR_COMMON_LDLIBS) \
     $(EMULATOR_LIBQEMU_LDLIBS) \
     $(EMULATOR_LIBUI_LDLIBS) \
-    $(ELFF_LDLIBS) \
+    $(ELFF_LDLIBS)
 
 common_LOCAL_CFLAGS += \
     $(EMULATOR_TARGET_CFLAGS) \
diff --git a/android-configure.sh b/android-configure.sh
index 9510ece..38af78e 100755
--- a/android-configure.sh
+++ b/android-configure.sh
@@ -22,7 +22,6 @@
 OPTION_NO_PREBUILTS=no
 OPTION_TRY_64=no
 OPTION_HELP=no
-OPTION_DEBUG=no
 OPTION_STATIC=no
 OPTION_MINGW=no
 
@@ -60,8 +59,6 @@
   ;;
   --no-strip) OPTION_NO_STRIP=yes
   ;;
-  --debug) OPTION_DEBUG=yes
-  ;;
   --ignore-audio) OPTION_IGNORE_AUDIO=yes
   ;;
   --no-prebuilts) OPTION_NO_PREBUILTS=yes
@@ -541,6 +538,10 @@
 echo "TARGET_ARCH       := x86" >> $config_mk
 fi
 
+if [ $TARGET_ARCH = mips ] ; then
+echo "TARGET_ARCH       := mips" >> $config_mk
+fi
+
 echo "HOST_PREBUILT_TAG := $TARGET_OS" >> $config_mk
 echo "HOST_EXEEXT       := $TARGET_EXEEXT" >> $config_mk
 echo "PREBUILT          := $ANDROID_PREBUILT" >> $config_mk
diff --git a/android/avd/util.c b/android/avd/util.c
index a174ee3..cc51e0f 100644
--- a/android/avd/util.c
+++ b/android/avd/util.c
@@ -254,6 +254,8 @@
             result = "arm";
         else if (!strcmp("armeabi-v7a", cpuAbi))
             result = "arm";
+        else if (!strncmp("mips", cpuAbi, 4))
+            result = "mips";
         else
             result = cpuAbi;
 
diff --git a/android/config/target-mips/config.h b/android/config/target-mips/config.h
new file mode 100644
index 0000000..4002cdc
--- /dev/null
+++ b/android/config/target-mips/config.h
@@ -0,0 +1,5 @@
+/* MIPS-specific configuration */
+#include "android/config/config.h"
+
+#define TARGET_MIPS 1
+#define CONFIG_SOFTFLOAT 1
diff --git a/android/main.c b/android/main.c
index d9d2274..4178a6b 100644
--- a/android/main.c
+++ b/android/main.c
@@ -407,6 +407,9 @@
 #elif defined(TARGET_I386)
         free(android_hw->hw_cpu_arch);
         android_hw->hw_cpu_arch = ASTRDUP("x86");
+#elif defined(TARGET_MIPS)
+        free(android_hw->hw_cpu_arch);
+        android_hw->hw_cpu_arch = ASTRDUP("mips");
 #endif
     }
 
diff --git a/hw/android_mips.c b/hw/android_mips.c
new file mode 100644
index 0000000..54c3c00
--- /dev/null
+++ b/hw/android_mips.c
@@ -0,0 +1,282 @@
+/* Copyright (C) 2007-2008 The Android Open Source Project
+**
+** This software is licensed under the terms of the GNU General Public
+** License version 2, as published by the Free Software Foundation, and
+** may be copied, distributed, and modified under those terms.
+**
+** This program is distributed in the hope that it will be useful,
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+** GNU General Public License for more details.
+*/
+#include "hw.h"
+#include "boards.h"
+#include "devices.h"
+#include "net.h"
+#include "sysemu.h"
+#include "mips.h"
+#include "goldfish_device.h"
+#include "android/globals.h"
+#include "audio/audio.h"
+#include "blockdev.h"
+#ifdef CONFIG_MEMCHECK
+#include "memcheck/memcheck_api.h"
+#endif  // CONFIG_MEMCHECK
+
+#include "android/utils/debug.h"
+
+#define  D(...)  VERBOSE_PRINT(init,__VA_ARGS__)
+
+#define MIPS_CPU_SAVE_VERSION  1
+#define GOLDFISH_IO_SPACE       0x1f000000
+#define GOLDFISH_INTERRUPT	0x1f000000
+#define GOLDFISH_DEVICEBUS	0x1f001000
+#define GOLDFISH_TTY		0x1f002000
+#define GOLDFISH_RTC		0x1f003000
+#define GOLDFISH_AUDIO		0x1f004000
+#define GOLDFISH_MMC		0x1f005000
+#define GOLDFISH_MEMLOG		0x1f006000
+#define GOLDFISH_DEVICES	0x1f010000
+
+char* audio_input_source = NULL;
+
+void goldfish_memlog_init(uint32_t base);
+
+static struct goldfish_device event0_device = {
+    .name = "goldfish_events",
+    .id = 0,
+    .size = 0x1000,
+    .irq_count = 1
+};
+
+static struct goldfish_device nand_device = {
+    .name = "goldfish_nand",
+    .id = 0,
+    .size = 0x1000
+};
+
+/* Board init.  */
+
+#define TEST_SWITCH 1
+#if TEST_SWITCH
+uint32_t switch_test_write(void *opaque, uint32_t state)
+{
+    goldfish_switch_set_state(opaque, state);
+    return state;
+}
+#endif
+
+#define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
+
+#define PHYS_TO_VIRT(x) ((x) | ~(target_ulong)0x7fffffff)
+
+static void android_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
+              const char *kernel_cmdline, const char *initrd_filename)
+{
+    int initrd_size;
+    ram_addr_t initrd_offset;
+    uint64_t kernel_entry, kernel_low, kernel_high;
+    unsigned int cmdline;
+
+    /* Load the kernel.  */
+    if (!kernel_filename) {
+        fprintf(stderr, "Kernel image must be specified\n");
+        exit(1);
+    }
+    if (load_elf(kernel_filename, VIRT_TO_PHYS_ADDEND,
+         (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low,
+         (uint64_t *)&kernel_high) < 0) {
+    fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);
+    exit(1);
+    }
+    env->active_tc.PC = (int32_t)kernel_entry;
+
+    /* load initrd */
+    initrd_size = 0;
+    initrd_offset = 0;
+    if (initrd_filename) {
+    initrd_size = get_image_size (initrd_filename);
+    if (initrd_size > 0) {
+        initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
+            if (initrd_offset + initrd_size > ram_size) {
+        fprintf(stderr,
+                        "qemu: memory too small for initial ram disk '%s'\n",
+                        initrd_filename);
+                exit(1);
+            }
+            initrd_size = load_image_targphys(initrd_filename,
+                                               initrd_offset,
+                                               ram_size - initrd_offset);
+
+    }
+        if (initrd_size == (target_ulong) -1) {
+        fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
+            initrd_filename);
+            exit(1);
+        }
+    }
+
+    /* Store command line in top page of memory
+     * kernel will copy the command line to a loca buffer
+     */
+    cmdline = ram_size - TARGET_PAGE_SIZE;
+    char kernel_cmd[1024];
+    if (initrd_size > 0)
+        sprintf (kernel_cmd, "%s rd_start=0x" TARGET_FMT_lx " rd_size=%li",
+                       kernel_cmdline,
+                       PHYS_TO_VIRT(initrd_offset), initrd_size);
+    else
+        strcpy (kernel_cmd, kernel_cmdline);
+
+    cpu_physical_memory_write(ram_size - TARGET_PAGE_SIZE, (void *)kernel_cmd, strlen(kernel_cmd) + 1);
+   
+#if 0
+    if (initrd_size > 0)
+        sprintf (phys_ram_base+cmdline, "%s rd_start=0x" TARGET_FMT_lx " rd_size=%li",
+                       kernel_cmdline,
+                       PHYS_TO_VIRT(initrd_offset), initrd_size);
+    else
+        strcpy (phys_ram_base+cmdline, kernel_cmdline);
+#endif
+
+    env->active_tc.gpr[4] = PHYS_TO_VIRT(cmdline);/* a0 */
+    env->active_tc.gpr[5] = ram_size;       /* a1 */
+    env->active_tc.gpr[6] = 0;          /* a2 */
+    env->active_tc.gpr[7] = 0;          /* a3 */
+
+}
+
+
+static void android_mips_init_(ram_addr_t ram_size,
+    const char *boot_device,
+    const char *kernel_filename,
+    const char *kernel_cmdline,
+    const char *initrd_filename,
+    const char *cpu_model)
+{
+    CPUState *env;
+    qemu_irq *goldfish_pic;
+    int i;
+    ram_addr_t ram_offset;
+
+    if (!cpu_model)
+        cpu_model = "24Kf";
+
+    env = cpu_init(cpu_model);
+
+    register_savevm( "cpu", 0, MIPS_CPU_SAVE_VERSION, cpu_save, cpu_load, env );
+
+    if (ram_size > GOLDFISH_IO_SPACE)
+        ram_size = GOLDFISH_IO_SPACE;   /* avoid overlap of ram and IO regs */
+    ram_offset = qemu_ram_alloc(NULL, "android_mips", ram_size);
+    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
+
+    /* Init internal devices */
+    cpu_mips_irq_init_cpu(env);
+    cpu_mips_clock_init(env);
+
+    goldfish_pic = goldfish_interrupt_init(GOLDFISH_INTERRUPT,
+					   env->irq[2], env->irq[3]);
+    goldfish_device_init(goldfish_pic, GOLDFISH_DEVICES, 0x7f0000, 10, 22);
+
+    goldfish_device_bus_init(GOLDFISH_DEVICEBUS, 1);
+
+    goldfish_timer_and_rtc_init(GOLDFISH_RTC, 3);
+
+    goldfish_tty_add(serial_hds[0], 0, GOLDFISH_TTY, 4);
+    for(i = 1; i < MAX_SERIAL_PORTS; i++) {
+        if(serial_hds[i]) {
+            goldfish_tty_add(serial_hds[i], i, 0, 0);
+        }
+    }
+
+    for(i = 0; i < MAX_NICS; i++) {
+        if (nd_table[i].vlan) {
+            if (nd_table[i].model == NULL
+                || strcmp(nd_table[i].model, "smc91c111") == 0) {
+                struct goldfish_device *smc_device;
+                smc_device = qemu_mallocz(sizeof(*smc_device));
+                smc_device->name = "smc91x";
+                smc_device->id = i;
+                smc_device->size = 0x1000;
+                smc_device->irq_count = 1;
+                goldfish_add_device_no_io(smc_device);
+                smc91c111_init(&nd_table[i], smc_device->base, goldfish_pic[smc_device->irq]);
+            } else {
+                fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
+                exit (1);
+            }
+        }
+    }
+
+    goldfish_fb_init(0);
+#ifdef HAS_AUDIO
+    goldfish_audio_init(GOLDFISH_AUDIO, 0, audio_input_source);
+#endif
+    {
+        DriveInfo* info = drive_get( IF_IDE, 0, 0 );
+        if (info != NULL) {
+            goldfish_mmc_init(GOLDFISH_MMC, 0, info->bdrv);
+	}
+    }
+    goldfish_memlog_init(GOLDFISH_MEMLOG);
+
+    if (android_hw->hw_battery)
+        goldfish_battery_init();
+
+    goldfish_add_device_no_io(&event0_device);
+    events_dev_init(event0_device.base, goldfish_pic[event0_device.irq]);
+
+#ifdef CONFIG_NAND
+    goldfish_add_device_no_io(&nand_device);
+    nand_dev_init(nand_device.base);
+#endif
+#ifdef CONFIG_TRACE
+    extern const char *trace_filename;
+    /* Init trace device if either tracing, or memory checking is enabled. */
+    if (trace_filename != NULL
+#ifdef CONFIG_MEMCHECK
+        || memcheck_enabled
+#endif  // CONFIG_MEMCHECK
+        || 1  /* XXX: ALWAYS AVAILABLE FOR QEMUD PIPES */
+       ) {
+        trace_dev_init();
+    }
+    if (trace_filename != NULL) {
+        D( "Trace file name is set to %s\n", trace_filename );
+    } else  {
+        D("Trace file name is not set\n");
+    }
+#endif
+
+    pipe_dev_init();
+
+#if TEST_SWITCH
+    {
+        void *sw;
+        sw = goldfish_switch_add("test", NULL, NULL, 0);
+        goldfish_switch_set_state(sw, 1);
+        goldfish_switch_add("test2", switch_test_write, sw, 1);
+    }
+#endif
+
+    android_load_kernel(env, ram_size, kernel_filename, kernel_cmdline, initrd_filename);
+}
+
+
+QEMUMachine android_mips_machine = {
+    "android_mips",
+    "MIPS Android Emulator",
+    android_mips_init_,
+    0,
+    0,
+    1,
+    NULL
+};
+
+static void android_mips_init(void)
+{
+    qemu_register_machine(&android_mips_machine);
+}
+
+machine_init(android_mips_init);
diff --git a/hw/boards.h b/hw/boards.h
index 4a71e56..8242af6 100644
--- a/hw/boards.h
+++ b/hw/boards.h
@@ -27,4 +27,7 @@
 /* android_arm.c */
 extern QEMUMachine android_arm_machine;
 
+/* android_mips.c */
+extern QEMUMachine android_mips_machine;
+
 #endif
diff --git a/hw/mips_pic.c b/hw/mips_pic.c
new file mode 100644
index 0000000..9d146b8
--- /dev/null
+++ b/hw/mips_pic.c
@@ -0,0 +1,39 @@
+/*
+ * MIPS CPU interrupt support.
+ *
+ */
+
+#include "hw.h"
+
+/* Stub functions for hardware that don't exist.  */
+void pic_info(void)
+{
+}
+
+void irq_info(void)
+{
+}
+
+static void mips_cpu_irq_handler(void *opaque, int irq, int level)
+{
+    CPUState *env = (CPUState *)opaque;
+    int causebit;
+
+    if (irq < 0 || 7 < irq)
+        cpu_abort(env, "mips_pic_cpu_handler: Bad interrupt line %d\n",
+                  irq);
+
+    causebit = 0x00000100 << irq;
+    if (level) {
+        env->CP0_Cause |= causebit;
+        cpu_interrupt(env, CPU_INTERRUPT_HARD);
+    } else {
+        env->CP0_Cause &= ~causebit;
+        cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
+    }
+}
+
+qemu_irq *mips_cpu_irq_init(CPUState *env)
+{
+    return qemu_allocate_irqs(mips_cpu_irq_handler, env, 8);
+}
diff --git a/softmmu_outside_jit.h b/softmmu_outside_jit.h
index 07ba4c7..21ead05 100644
--- a/softmmu_outside_jit.h
+++ b/softmmu_outside_jit.h
@@ -49,7 +49,11 @@
 // =============================================================================
 // Generate ld/stx_user
 // =============================================================================
+#if defined(TARGET_MIPS)
+#define MEMSUFFIX MMU_MODE2_SUFFIX
+#else
 #define MEMSUFFIX MMU_MODE1_SUFFIX
+#endif
 #define ACCESS_TYPE 1
 
 #define DATA_SIZE 1
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 27bdc95..7c04fbe 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -518,6 +518,37 @@
     env->active_tc.gpr[2] = 0;
 }
 
+static inline int cpu_mips_hw_interrupts_pending(CPUState *env)
+{
+    int32_t pending;
+    int32_t status;
+    int r;
+
+    if (!(env->CP0_Status & (1 << CP0St_IE)) ||
+        (env->CP0_Status & (1 << CP0St_EXL)) ||
+        (env->CP0_Status & (1 << CP0St_ERL)) ||
+        (env->hflags & MIPS_HFLAG_DM)) {
+        /* Interrupts are disabled */
+        return 0;
+    }
+
+    pending = env->CP0_Cause & CP0Ca_IP_mask;
+    status = env->CP0_Status & CP0Ca_IP_mask;
+
+    if (env->CP0_Config3 & (1 << CP0C3_VEIC)) {
+        /* A MIPS configured with a vectorizing external interrupt controller
+           will feed a vector into the Cause pending lines. The core treats
+           the status lines as a vector level, not as indiviual masks.  */
+        r = pending > status;
+    } else {
+        /* A MIPS configured with compatibility or VInt (Vectored Interrupts)
+           treats the pending lines as individual interrupt lines, the status
+           lines are individual masks.  */
+        r = pending & status;
+    }
+    return r;
+}
+
 #include "cpu-all.h"
 #include "exec-all.h"
 
diff --git a/target-mips/exec.h b/target-mips/exec.h
index 8a118bb..0720366 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -35,10 +35,22 @@
 
 static inline int cpu_has_work(CPUState *env)
 {
-    return (env->interrupt_request &
-            (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER));
-}
+    int has_work = 0;
 
+    /* It is implementation dependent if non-enabled interrupts
+       wake-up the CPU, however most of the implementations only
+       check for interrupts that can be taken. */
+    if ((env->interrupt_request & CPU_INTERRUPT_HARD) &&
+        cpu_mips_hw_interrupts_pending(env)) {
+        has_work = 1;
+    }
+
+    if (env->interrupt_request & CPU_INTERRUPT_TIMER) {
+        has_work = 1;
+    }
+
+    return has_work;
+}
 
 static inline int cpu_halted(CPUState *env)
 {