Merge branch 'mycroft'
diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c
index 30dcf1b..92a2dcf 100644
--- a/arch/arm/cpu/armv7/omap-common/emif-common.c
+++ b/arch/arm/cpu/armv7/omap-common/emif-common.c
@@ -1203,7 +1203,7 @@
writel(lisa_map_regs->dmm_lisa_map_0,
&hw_lisa_map_regs->dmm_lisa_map_0);
- if (omap_revision() >= OMAP4460_ES1_0) {
+ if (lisa_map_regs->is_ma_present) {
hw_lisa_map_regs =
(struct dmm_lisa_map_regs *)MA_BASE;
diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c b/arch/arm/cpu/armv7/omap4/hwinit.c
index 2c34e48..9ee792e 100644
--- a/arch/arm/cpu/armv7/omap4/hwinit.c
+++ b/arch/arm/cpu/armv7/omap4/hwinit.c
@@ -157,6 +157,9 @@
break;
case MIDR_CORTEX_A9_R2P10:
switch (readl(CONTROL_ID_CODE)) {
+ case OMAP4470_CONTROL_ID_CODE_ES1_0:
+ *omap_si_rev = OMAP4470_ES1_0;
+ break;
case OMAP4460_CONTROL_ID_CODE_ES1_1:
*omap_si_rev = OMAP4460_ES1_1;
break;
diff --git a/arch/arm/cpu/armv7/omap4/sdram_elpida.c b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
index b9128fa..ceafef6 100644
--- a/arch/arm/cpu/armv7/omap4/sdram_elpida.c
+++ b/arch/arm/cpu/armv7/omap4/sdram_elpida.c
@@ -48,7 +48,7 @@
#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-static const struct emif_regs emif_regs_elpida_200_mhz_2cs = {
+const struct emif_regs emif_regs_elpida_200_mhz_2cs = {
.sdram_config_init = 0x80000eb9,
.sdram_config = 0x80001ab9,
.ref_ctrl = 0x0000030c,
@@ -62,7 +62,7 @@
.emif_ddr_phy_ctlr_1 = 0x049ff808
};
-static const struct emif_regs emif_regs_elpida_380_mhz_1cs = {
+const struct emif_regs emif_regs_elpida_380_mhz_1cs = {
.sdram_config_init = 0x80000eb1,
.sdram_config = 0x80001ab1,
.ref_ctrl = 0x000005cd,
@@ -76,6 +76,20 @@
.emif_ddr_phy_ctlr_1 = 0x049ff418
};
+const struct emif_regs emif_regs_elpida_400_mhz_1cs = {
+ .sdram_config_init = 0x80800eb2,
+ .sdram_config = 0x80801ab2,
+ .ref_ctrl = 0x00000618,
+ .sdram_tim1 = 0x10eb0662,
+ .sdram_tim2 = 0x20370dd2,
+ .sdram_tim3 = 0x00b1c33f,
+ .read_idle_ctrl = 0x000501ff,
+ .zq_config = 0x500b3215,
+ .temp_alert_config = 0x58016893,
+ .emif_ddr_phy_ctlr_1_init = 0x049ffff5,
+ .emif_ddr_phy_ctlr_1 = 0x049ff418
+};
+
const struct emif_regs emif_regs_elpida_400_mhz_2cs = {
.sdram_config_init = 0x80000eb9,
.sdram_config = 0x80001ab9,
@@ -97,14 +111,24 @@
.dmm_lisa_map_0 = 0xFF020100,
.dmm_lisa_map_1 = 0,
.dmm_lisa_map_2 = 0,
- .dmm_lisa_map_3 = 0x80540300
+ .dmm_lisa_map_3 = 0x80540300,
+ .is_ma_present = 0x0
};
const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2 = {
.dmm_lisa_map_0 = 0xFF020100,
.dmm_lisa_map_1 = 0,
.dmm_lisa_map_2 = 0,
- .dmm_lisa_map_3 = 0x80640300
+ .dmm_lisa_map_3 = 0x80640300,
+ .is_ma_present = 0x0
+};
+
+const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2 = {
+ .dmm_lisa_map_0 = 0xFF020100,
+ .dmm_lisa_map_1 = 0,
+ .dmm_lisa_map_2 = 0,
+ .dmm_lisa_map_3 = 0x80640300,
+ .is_ma_present = 0x1
};
static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
@@ -116,8 +140,12 @@
*regs = &emif_regs_elpida_380_mhz_1cs;
else if (omap4_rev == OMAP4430_ES2_0)
*regs = &emif_regs_elpida_200_mhz_2cs;
- else
+ else if (omap4_rev == OMAP4430_ES2_3)
+ *regs = &emif_regs_elpida_400_mhz_1cs;
+ else if (omap4_rev < OMAP4470_ES1_0)
*regs = &emif_regs_elpida_400_mhz_2cs;
+ else
+ *regs = &emif_regs_elpida_400_mhz_1cs;
}
void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
__attribute__((weak, alias("emif_get_reg_dump_sdp")));
@@ -129,8 +157,12 @@
if (omap_rev == OMAP4430_ES1_0)
*dmm_lisa_regs = &lisa_map_2G_x_1_x_2;
- else
+ else if (omap_rev == OMAP4430_ES2_3)
*dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
+ else if (omap_rev < OMAP4460_ES1_0)
+ *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
+ else
+ *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2;
}
void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
@@ -145,20 +177,31 @@
.manufacturer = LPDDR2_MANUFACTURER_ELPIDA
};
+static const struct lpddr2_device_details elpida_4G_S4_details = {
+ .type = LPDDR2_TYPE_S4,
+ .density = LPDDR2_DENSITY_4Gb,
+ .io_width = LPDDR2_IO_WIDTH_32,
+ .manufacturer = LPDDR2_MANUFACTURER_ELPIDA
+};
+
struct lpddr2_device_details *emif_get_device_details_sdp(u32 emif_nr, u8 cs,
struct lpddr2_device_details *lpddr2_dev_details)
{
u32 omap_rev = omap_revision();
/* EMIF1 & EMIF2 have identical configuration */
- if ((omap_rev == OMAP4430_ES1_0) && (cs == CS1)) {
- /* Nothing connected on CS1 for ES1.0 */
+ if (((omap_rev == OMAP4430_ES1_0) || (omap_rev == OMAP4470_ES1_0))
+ && (cs == CS1)) {
+ /* Nothing connected on CS1 for 4430/4470 ES1.0 */
return NULL;
- } else {
- /* In all other cases Elpida 2G device */
+ } else if (omap_rev < OMAP4470_ES1_0) {
+ /* In all other 4430/4460 cases Elpida 2G device */
*lpddr2_dev_details = elpida_2G_S4_details;
- return lpddr2_dev_details;
+ } else {
+ /* 4470: 4G device */
+ *lpddr2_dev_details = elpida_4G_S4_details;
}
+ return lpddr2_dev_details;
}
struct lpddr2_device_details *emif_get_device_details(u32 emif_nr, u8 cs,
@@ -272,7 +315,7 @@
/* Identical devices on EMIF1 & EMIF2 */
*cs0_device_timings = &elpida_2G_S4_timings;
- if (omap_rev == OMAP4430_ES1_0)
+ if ((omap_rev == OMAP4430_ES1_0) || (omap_rev == OMAP4470_ES1_0))
*cs1_device_timings = NULL;
else
*cs1_device_timings = &elpida_2G_S4_timings;
diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c
index 6ebdf5f..e9f0106 100644
--- a/arch/arm/cpu/armv7/omap5/sdram.c
+++ b/arch/arm/cpu/armv7/omap5/sdram.c
@@ -113,7 +113,8 @@
.dmm_lisa_map_0 = 0x0,
.dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x80740300,
- .dmm_lisa_map_3 = 0xFF020100
+ .dmm_lisa_map_3 = 0xFF020100,
+ .is_ma_present = 0x1
};
const u32 ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG] = {
diff --git a/arch/arm/include/asm/arch-omap4/gpio.h b/arch/arm/include/asm/arch-omap4/gpio.h
index 26f19d1..48e24bc 100644
--- a/arch/arm/include/asm/arch-omap4/gpio.h
+++ b/arch/arm/include/asm/arch-omap4/gpio.h
@@ -47,4 +47,6 @@
#define OMAP44XX_GPIO5_BASE 0x4805B000
#define OMAP44XX_GPIO6_BASE 0x4805D000
+#define gpio_status() gpio_info()
+
#endif /* _GPIO_OMAP4_H */
diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index a7e97eb..cb09699 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -65,6 +65,7 @@
#define OMAP4_CONTROL_ID_CODE_ES2_3 0x6B95C02F
#define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F
#define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F
+#define OMAP4470_CONTROL_ID_CODE_ES1_0 0x0B97502F
/* UART */
#define UART1_BASE (OMAP44XX_L4_PER_BASE + 0x6a000)
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h b/arch/arm/include/asm/arch-omap4/sys_proto.h
index 77f2cf7..f76c519 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -27,6 +27,10 @@
#include <asm/omap_common.h>
#include <asm/arch/mux_omap4.h>
+extern const struct emif_regs emif_regs_elpida_200_mhz_2cs;
+extern const struct emif_regs emif_regs_elpida_380_mhz_1cs;
+extern const struct emif_regs emif_regs_elpida_400_mhz_1cs;
+extern const struct emif_regs emif_regs_elpida_400_mhz_2cs;
struct omap_sysinfo {
char *board_string;
};
diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h
index ed251ec..10f532a 100644
--- a/arch/arm/include/asm/emif.h
+++ b/arch/arm/include/asm/emif.h
@@ -696,6 +696,7 @@
u32 dmm_lisa_map_1;
u32 dmm_lisa_map_2;
u32 dmm_lisa_map_3;
+ u8 is_ma_present;
};
extern const u32 ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG];
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 2a40b89..e701c98 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -55,6 +55,7 @@
#define OMAP4430_ES2_3 0x44300230
#define OMAP4460_ES1_0 0x44600100
#define OMAP4460_ES1_1 0x44600110
+#define OMAP4470_ES1_0 0x44700100
/* omap5 */
#define OMAP5430_SILICON_ID_INVALID 0
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index 20be81c..c23fd67 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -86,6 +86,53 @@
}
/**
+ * is_panda_es_rev_b3() - Detect if we are running on rev B3 of panda board ES
+ *
+ *
+ * Detect if we are running on B3 version of ES panda board,
+ * This can be done by reading the level of GPIO 171 and checking the
+ * processor revisions.
+ * GPIO171: 1 => Panda ES Rev B3
+ *
+ * Return : return 1 if Panda ES Rev B3 , else return 0
+ */
+u8 is_panda_es_rev_b3(void)
+{
+ return 1;
+}
+
+#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+/*
+ * emif_get_reg_dump() - emif_get_reg_dump strong function
+ *
+ * @emif_nr - emif base
+ * @regs - reg dump of timing values
+ *
+ * Strong function to override emif_get_reg_dump weak function in sdram_elpida.c
+ */
+void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
+{
+ u32 omap4_rev = omap_revision();
+
+ /* Same devices and geometry on both EMIFs */
+ if (omap4_rev == OMAP4430_ES1_0)
+ *regs = &emif_regs_elpida_380_mhz_1cs;
+ else if (omap4_rev == OMAP4430_ES2_0)
+ *regs = &emif_regs_elpida_200_mhz_2cs;
+ else if (omap4_rev == OMAP4430_ES2_3)
+ *regs = &emif_regs_elpida_400_mhz_1cs;
+ else if (omap4_rev < OMAP4470_ES1_0) {
+ if(is_panda_es_rev_b3())
+ *regs = &emif_regs_elpida_400_mhz_1cs;
+ else
+ *regs = &emif_regs_elpida_400_mhz_2cs;
+ }
+ else
+ *regs = &emif_regs_elpida_400_mhz_1cs;
+}
+#endif
+
+/**
* @brief misc_init_r - Configure Panda board specific configurations
* such as power configurations, ethernet initialization as phase2 of
* boot sequence
@@ -101,6 +148,10 @@
if (omap_revision() == OMAP4430_ES1_0)
return 0;
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+ setenv("board_name", strcat(CONFIG_SYS_BOARD, "-moto"));
+#endif
+
gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO);
phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
diff --git a/board/ti/panda/panda_mux_data.h b/board/ti/panda/panda_mux_data.h
index 5939257..093564f 100644
--- a/board/ti/panda/panda_mux_data.h
+++ b/board/ti/panda/panda_mux_data.h
@@ -31,16 +31,16 @@
const struct pad_conf_entry core_padconf_array_essential[] = {
-{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */
-{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */
-{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */
-{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */
-{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */
-{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */
-{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */
-{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */
-{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */
-{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */
+{GPMC_AD0, (M7)}, /* sdmmc2_dat0 */
+{GPMC_AD1, (M7)}, /* sdmmc2_dat1 */
+{GPMC_AD2, (M7)}, /* sdmmc2_dat2 */
+{GPMC_AD3, (M7)}, /* sdmmc2_dat3 */
+{GPMC_AD4, (M7)}, /* sdmmc2_dat4 */
+{GPMC_AD5, (M7)}, /* sdmmc2_dat5 */
+{GPMC_AD6, (M7)}, /* sdmmc2_dat6 */
+{GPMC_AD7, (M7)}, /* sdmmc2_dat7 */
+{GPMC_NOE, (M7)}, /* sdmmc2_clk */
+{GPMC_NWE, (M7)}, /* sdmmc2_cmd */
{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */
{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */
{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */
@@ -77,11 +77,15 @@
{USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */
{USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */
{USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */
-{USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */
-{USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */
-{UNIPRO_TY2, (PTU | IEN | M3)}, /* gpio_1 */
-{GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_62 */
-{FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182 */
+{USBC1_ICUSB_DP, (M7)}, /* usbc1_icusb_dp */
+{USBC1_ICUSB_DM, (M7)}, /* usbc1_icusb_dm */
+{UNIPRO_TY2, (PTU | IEN | M3)}, /* hub_power */
+{GPMC_WAIT1, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* hub_nreset */
+{FREF_CLK2_OUT, (PTU | IEN | M3)}, /* gpio_182/board_id0 */
+{GPMC_A24, (PTU | IEN | M3)}, /* gpio_48/board_id1 */
+{UNIPRO_TX0, (PTU | IEN | M3)}, /* gpio_171/board_id2 */
+{UNIPRO_RY2, (IEN | M3)}, /* gpio_3/board_id3 */
+{UNIPRO_RX2, (IEN | M3)}, /* gpio_2/board_id4 */
};
@@ -101,60 +105,59 @@
};
const struct pad_conf_entry core_padconf_array_non_essential[] = {
- {GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_32 */
- {GPMC_AD9, (PTU | IEN | M3)}, /* gpio_33 */
- {GPMC_AD10, (PTU | IEN | M3)}, /* gpio_34 */
- {GPMC_AD11, (PTU | IEN | M3)}, /* gpio_35 */
- {GPMC_AD12, (PTU | IEN | M3)}, /* gpio_36 */
- {GPMC_AD13, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_37 */
- {GPMC_AD14, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_38 */
- {GPMC_AD15, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_39 */
- {GPMC_A16, (M3)}, /* gpio_40 */
- {GPMC_A17, (PTD | M3)}, /* gpio_41 */
- {GPMC_A18, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row6 */
- {GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row7 */
- {GPMC_A20, (IEN | M3)}, /* gpio_44 */
- {GPMC_A21, (M3)}, /* gpio_45 */
- {GPMC_A22, (M3)}, /* gpio_46 */
- {GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col7 */
- {GPMC_A24, (PTD | M3)}, /* gpio_48 */
- {GPMC_A25, (PTD | M3)}, /* gpio_49 */
- {GPMC_NCS0, (M3)}, /* gpio_50 */
- {GPMC_NCS1, (IEN | M3)}, /* gpio_51 */
- {GPMC_NCS2, (IEN | M3)}, /* gpio_52 */
- {GPMC_NCS3, (IEN | M3)}, /* gpio_53 */
- {GPMC_NWP, (M3)}, /* gpio_54 */
- {GPMC_CLK, (PTD | M3)}, /* gpio_55 */
- {GPMC_NADV_ALE, (M3)}, /* gpio_56 */
- {GPMC_NBE0_CLE, (M3)}, /* gpio_59 */
- {GPMC_NBE1, (PTD | M3)}, /* gpio_60 */
- {GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */
- {C2C_DATA11, (PTD | M3)}, /* gpio_100 */
- {C2C_DATA12, (PTU | IEN | M3)}, /* gpio_101 */
- {C2C_DATA13, (PTD | M3)}, /* gpio_102 */
- {C2C_DATA14, (M1)}, /* dsi2_te0 */
- {C2C_DATA15, (PTD | M3)}, /* gpio_104 */
+ {GPMC_AD8, (M7)}, /* gpio_32 */
+ {GPMC_AD9, (M7)}, /* gpio_33 */
+ {GPMC_AD10, (M7)}, /* gpio_34 */
+ {GPMC_AD11, (M7)}, /* gpio_35 */
+ {GPMC_AD12, (M7)}, /* gpio_36 */
+ {GPMC_AD13, (M7)}, /* gpio_37 */
+ {GPMC_AD14, (M7)}, /* gpio_38 */
+ {GPMC_AD15, (M7)}, /* gpio_39 */
+ {GPMC_A16, (M7)}, /* gpio_40 */
+ {GPMC_A17, (PTD | M3)}, /* gpio_41/hdmi_ls_oe */
+ {GPMC_A18, (M7)}, /* kpd_row6 */
+ {GPMC_A19, (M7)}, /* gpio_43/sdio_exp_act_n */
+ {GPMC_A20, (M7)}, /* gpio_44 */
+ {GPMC_A21, (M7)}, /* gpio_45 */
+ {GPMC_A22, (M7)}, /* gpio_46 */
+ {GPMC_A23, (M7)}, /* kpd_col7 */
+ {GPMC_A25, (M7)}, /* gpio_49 */
+ {GPMC_NCS0, (M7)}, /* gpio_50 */
+ {GPMC_NCS1, (M7)}, /* gpio_51 */
+ {GPMC_NCS2, (IEN | M3)}, /* gpio_52/ts_int */
+ {GPMC_NCS3, (M7)}, /* gpio_53 */
+ {GPMC_NWP, (M7)}, /* gpio_54 */
+ {GPMC_CLK, (M7)}, /* gpio_55 */
+ {GPMC_NADV_ALE, (M7)}, /* gpio_56 */
+ {GPMC_NBE0_CLE, (M7)}, /* gpio_59 */
+ {GPMC_NBE1, (PTD | M3)}, /* gpio_60/hdmi_ct_cp_hpd */
+ {GPMC_WAIT0, (M7)}, /* gpio_61 */
+ {C2C_DATA11, (M7)}, /* gpio_100 */
+ {C2C_DATA12, (PTU | IEN | M3)}, /* gpio_101/tearing_effect */
+ {C2C_DATA13, (PTD | M3)}, /* gpio_102/lcd_reset */
+ {C2C_DATA14, (M7)}, /* dsi2_te0 */
+ {C2C_DATA15, (M7)}, /* gpio_104 */
{HDMI_HPD, (M0)}, /* hdmi_hpd */
{HDMI_CEC, (M0)}, /* hdmi_cec */
{HDMI_DDC_SCL, (PTU | M0)}, /* hdmi_ddc_scl */
{HDMI_DDC_SDA, (PTU | IEN | M0)}, /* hdmi_ddc_sda */
- {CSI21_DX0, (IEN | M0)}, /* csi21_dx0 */
- {CSI21_DY0, (IEN | M0)}, /* csi21_dy0 */
- {CSI21_DX1, (IEN | M0)}, /* csi21_dx1 */
- {CSI21_DY1, (IEN | M0)}, /* csi21_dy1 */
- {CSI21_DX2, (IEN | M0)}, /* csi21_dx2 */
- {CSI21_DY2, (IEN | M0)}, /* csi21_dy2 */
- {CSI21_DX3, (PTD | M7)}, /* csi21_dx3 */
- {CSI21_DY3, (PTD | M7)}, /* csi21_dy3 */
- {CSI21_DX4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dx4 */
- {CSI21_DY4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dy4 */
- {CSI22_DX0, (IEN | M0)}, /* csi22_dx0 */
- {CSI22_DY0, (IEN | M0)}, /* csi22_dy0 */
- {CSI22_DX1, (IEN | M0)}, /* csi22_dx1 */
- {CSI22_DY1, (IEN | M0)}, /* csi22_dy1 */
- {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */
- {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */
- {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */
+ {CSI21_DX0, (M7)}, /* csi21_dx0 */
+ {CSI21_DY0, (M7)}, /* csi21_dy0 */
+ {CSI21_DX1, (M7)}, /* csi21_dx1 */
+ {CSI21_DY1, (M7)}, /* csi21_dy1 */
+ {CSI21_DX2, (M7)}, /* csi21_dx2 */
+ {CSI21_DY2, (M7)}, /* csi21_dy2 */
+ {CSI21_DX3, (M7)}, /* csi21_dx3 */
+ {CSI21_DY3, (M7)}, /* csi21_dy3 */
+ {CSI21_DX4, (M7)}, /* csi21_dx4 */
+ {CSI21_DY4, (M7)}, /* csi21_dy4 */
+ {CSI22_DX0, (M7)}, /* csi22_dx0 */
+ {CSI22_DY0, (M7)}, /* csi22_dy0 */
+ {CSI22_DX1, (M7)}, /* csi22_dx1 */
+ {CSI22_DY1, (M7)}, /* csi22_dy1 */
+ {CAM_SHUTTER, (M7)}, /* cam_shutter */
+ {CAM_STROBE, (M7)}, /* cam_strobe */
+ {CAM_GLOBALRESET, (M7)}, /* gpio_83 */
{ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */
{ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */
{ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */
@@ -167,59 +170,56 @@
{ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_frame */
{ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_lb_clk */
{ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_clks */
- {ABE_DMIC_CLK1, (M0)}, /* abe_dmic_clk1 */
- {ABE_DMIC_DIN1, (IEN | M0)}, /* abe_dmic_din1 */
- {ABE_DMIC_DIN2, (PTU | IEN | M3)}, /* gpio_121 */
- {ABE_DMIC_DIN3, (IEN | M0)}, /* abe_dmic_din3 */
- {UART2_CTS, (PTU | IEN | M7)}, /* uart2_cts */
+ {ABE_DMIC_CLK1, (M3)}, /* gpio_119 */
+ {ABE_DMIC_DIN1, (M7)}, /* abe_dmic_din1 */
+ {ABE_DMIC_DIN2, (PTD | M3)}, /* gpio_121/ts_reset */
+ {ABE_DMIC_DIN3, (M7)}, /* abe_dmic_din3 */
+ {UART2_CTS, (M7)}, /* uart2_cts */
{UART2_RTS, (M7)}, /* uart2_rts */
- {UART2_RX, (PTU | IEN | M7)}, /* uart2_rx */
+ {UART2_RX, (M7)}, /* uart2_rx */
{UART2_TX, (M7)}, /* uart2_tx */
{HDQ_SIO, (M3)}, /* gpio_127 */
- {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */
- {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */
- {MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_simo */
- {MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs0 */
- {MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* mcspi1_cs1 */
- {MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_139 */
- {MCSPI1_CS3, (PTU | IEN | M3)}, /* gpio_140 */
- {SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc5_clk */
- {SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_cmd */
- {SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat0 */
- {SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat1 */
- {SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat2 */
- {SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat3 */
- {MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_clk */
- {MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_simo */
- {MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_somi */
- {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_cs0 */
- {UART4_RX, (IEN | M0)}, /* uart4_rx */
- {UART4_TX, (M0)}, /* uart4_tx */
- {USBB2_ULPITLL_CLK, (IEN | M3)}, /* gpio_157 */
- {USBB2_ULPITLL_STP, (IEN | M5)}, /* dispc2_data23 */
- {USBB2_ULPITLL_DIR, (IEN | M5)}, /* dispc2_data22 */
- {USBB2_ULPITLL_NXT, (IEN | M5)}, /* dispc2_data21 */
- {USBB2_ULPITLL_DAT0, (IEN | M5)}, /* dispc2_data20 */
- {USBB2_ULPITLL_DAT1, (IEN | M5)}, /* dispc2_data19 */
- {USBB2_ULPITLL_DAT2, (IEN | M5)}, /* dispc2_data18 */
- {USBB2_ULPITLL_DAT3, (IEN | M5)}, /* dispc2_data15 */
- {USBB2_ULPITLL_DAT4, (IEN | M5)}, /* dispc2_data14 */
- {USBB2_ULPITLL_DAT5, (IEN | M5)}, /* dispc2_data13 */
- {USBB2_ULPITLL_DAT6, (IEN | M5)}, /* dispc2_data12 */
- {USBB2_ULPITLL_DAT7, (IEN | M5)}, /* dispc2_data11 */
- {USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_169 */
- {USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_170 */
- {UNIPRO_TX0, (PTD | IEN | M3)}, /* gpio_171 */
- {UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col1 */
- {UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */
- {UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */
- {UNIPRO_TX2, (PTU | IEN | M3)}, /* gpio_0 */
- {UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */
- {UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */
- {UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */
- {UNIPRO_RY1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row3 */
- {UNIPRO_RX2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row4 */
- {UNIPRO_RY2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row5 */
+ {MCSPI1_CLK, (M7)}, /* mcspi1_clk */
+ {MCSPI1_SOMI, (M7)}, /* mcspi1_somi */
+ {MCSPI1_SIMO, (M7)}, /* mcspi1_simo */
+ {MCSPI1_CS0, (M7)}, /* mcspi1_cs0 */
+ {MCSPI1_CS1, (M7)}, /* mcspi1_cs1 */
+ {MCSPI1_CS2, (M7)}, /* gpio_139 */
+ {MCSPI1_CS3, (M7)}, /* gpio_140 */
+ {SDMMC5_CLK, (M7)}, /* sdmmc5_clk */
+ {SDMMC5_CMD, (M7)}, /* sdmmc5_cmd */
+ {SDMMC5_DAT0, (M7)}, /* sdmmc5_dat0 */
+ {SDMMC5_DAT1, (M7)}, /* sdmmc5_dat1 */
+ {SDMMC5_DAT2, (M7)}, /* sdmmc5_dat2 */
+ {SDMMC5_DAT3, (M7)}, /* sdmmc5_dat3 */
+ {MCSPI4_CLK, (M7)}, /* sdmmc4_clk */
+ {MCSPI4_SIMO, (M7)}, /* sdmmc4_cmd */
+ {MCSPI4_SOMI, (M7)}, /* sdmmc4_dat0 */
+ {MCSPI4_CS0, (M7)}, /* sdmmc4_dat3 */
+ {UART4_RX, (M7)}, /* sdmmc4_dat2 */
+ {UART4_TX, (M7)}, /* sdmmc4_dat1 */
+ {USBB2_ULPITLL_CLK, (IEN | M3)}, /* gpio_157/sdio_select */
+ {USBB2_ULPITLL_STP, (IEN | M3)}, /* gpio_158/audio_select */
+ {USBB2_ULPITLL_DIR, (IEN | M3)}, /* gpio_159/display_mux */
+ {USBB2_ULPITLL_NXT, (IEN | M3)}, /* gpio_160/hdmi_select */
+ {USBB2_ULPITLL_DAT0, (IEN | M3)}, /* gpio_161 */
+ {USBB2_ULPITLL_DAT1, (IEN | M3)}, /* gpio_162 */
+ {USBB2_ULPITLL_DAT2, (IEN | M3)}, /* gpio_163 */
+ {USBB2_ULPITLL_DAT3, (IEN | M3)}, /* gpio_164 */
+ {USBB2_ULPITLL_DAT4, (M3)}, /* gpio_165 */
+ {USBB2_ULPITLL_DAT5, (M3)}, /* gpio_166 */
+ {USBB2_ULPITLL_DAT6, (M3)}, /* gpio_167 */
+ {USBB2_ULPITLL_DAT7, (M3)}, /* gpio_168 */
+ {USBB2_HSIC_DATA, (M3)}, /* gpio_169 */
+ {USBB2_HSIC_STROBE, (M3)}, /* gpio_170 */
+ {UNIPRO_TY0, (M7)}, /* kpd_col1 */
+ {UNIPRO_TX1, (M7)}, /* kpd_col2 */
+ {UNIPRO_TY1, (M7)}, /* kpd_col3 */
+ {UNIPRO_TX2, (M7)}, /* gpio_0 */
+ {UNIPRO_RX0, (M7)}, /* kpd_row0 */
+ {UNIPRO_RY0, (M7)}, /* kpd_row1 */
+ {UNIPRO_RX1, (M7)}, /* kpd_row2 */
+ {UNIPRO_RY1, (M7)}, /* kpd_row3 */
{USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */
{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */
{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */
@@ -235,23 +235,23 @@
{DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */
{DPM_EMU1, (IEN | M0)}, /* dpm_emu1 */
{DPM_EMU2, (IEN | M0)}, /* dpm_emu2 */
- {DPM_EMU3, (IEN | M5)}, /* dispc2_data10 */
- {DPM_EMU4, (IEN | M5)}, /* dispc2_data9 */
- {DPM_EMU5, (IEN | M5)}, /* dispc2_data16 */
- {DPM_EMU6, (IEN | M5)}, /* dispc2_data17 */
- {DPM_EMU7, (IEN | M5)}, /* dispc2_hsync */
- {DPM_EMU8, (IEN | M5)}, /* dispc2_pclk */
- {DPM_EMU9, (IEN | M5)}, /* dispc2_vsync */
- {DPM_EMU10, (IEN | M5)}, /* dispc2_de */
- {DPM_EMU11, (IEN | M5)}, /* dispc2_data8 */
- {DPM_EMU12, (IEN | M5)}, /* dispc2_data7 */
- {DPM_EMU13, (IEN | M5)}, /* dispc2_data6 */
- {DPM_EMU14, (IEN | M5)}, /* dispc2_data5 */
- {DPM_EMU15, (IEN | M5)}, /* dispc2_data4 */
- {DPM_EMU16, (M3)}, /* gpio_27 */
- {DPM_EMU17, (IEN | M5)}, /* dispc2_data2 */
- {DPM_EMU18, (IEN | M5)}, /* dispc2_data1 */
- {DPM_EMU19, (IEN | M5)}, /* dispc2_data0 */
+ {DPM_EMU3, (M7)}, /* dispc2_data10 */
+ {DPM_EMU4, (M7)}, /* dispc2_data9 */
+ {DPM_EMU5, (M7)}, /* dispc2_data16 */
+ {DPM_EMU6, (M7)}, /* dispc2_data17 */
+ {DPM_EMU7, (M7)}, /* dispc2_hsync */
+ {DPM_EMU8, (M7)}, /* dispc2_pclk */
+ {DPM_EMU9, (M7)}, /* dispc2_vsync */
+ {DPM_EMU10, (M7)}, /* dispc2_de */
+ {DPM_EMU11, (M7)}, /* dispc2_data8 */
+ {DPM_EMU12, (M7)}, /* dispc2_data7 */
+ {DPM_EMU13, (M7)}, /* dispc2_data6 */
+ {DPM_EMU14, (M7)}, /* dispc2_data5 */
+ {DPM_EMU15, (M7)}, /* dispc2_data4 */
+ {DPM_EMU16, (IEN | M3)}, /* btn0 */
+ {DPM_EMU17, (IEN | M3)}, /* btn1 */
+ {DPM_EMU18, (M3)}, /* led0 */
+ {DPM_EMU19, (M3)}, /* led1 */
};
const struct pad_conf_entry core_padconf_array_non_essential_4430[] = {
diff --git a/drivers/gpio/omap_gpio.c b/drivers/gpio/omap_gpio.c
index fc89f2a..07358a1 100644
--- a/drivers/gpio/omap_gpio.c
+++ b/drivers/gpio/omap_gpio.c
@@ -139,6 +139,13 @@
__raw_writel(l, reg);
}
+int gpio_get_direction(unsigned gpio)
+{
+ if (check_gpio(gpio) < 0)
+ return -1;
+ return _get_gpio_direction(get_gpio_bank(gpio), get_gpio_index(gpio));
+}
+
/**
* Set value of the specified gpio
*/
@@ -241,3 +248,13 @@
{
return 0;
}
+
+void gpio_info(void)
+{
+ unsigned gpio;
+
+ for (gpio = 0; gpio < 192; gpio++)
+ printf("GPIO %3d: %s %s\n", gpio,
+ gpio_get_direction(gpio) == OMAP_GPIO_DIR_OUT ? "out" : "in ",
+ gpio_get_value(gpio) ? "hi" : "lo");
+}
