DSI lane mapping is different on form factor.
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index d53dba9..b163847 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -630,6 +630,66 @@
     .channel = OMAP_DSS_CHANNEL_LCD,
 };
 
+static struct omap_dss_device omap4_panda_fpga_ff_dsi_device = {
+    .name = "lcd",
+    .driver_name = "tonka",
+    .type = OMAP_DISPLAY_TYPE_DSI,
+    .data =  &dsi1_panel,
+
+    .phy.dsi = {
+        .type = OMAP_DSS_DSI_TYPE_CMD_MODE,
+         .clk_lane = 2,
+         .clk_pol = 0,
+         .data1_lane = 5,
+         .data1_pol = 0,
+         .data2_lane = 1,
+         .data2_pol = 0,
+         .data3_lane = 4,
+         .data3_pol = 0,
+         .data4_lane = 3,
+         .data4_pol = 0,
+    },
+
+    .clocks = {
+        .dispc = {
+            .channel = {
+                .lck_div = 1,
+#ifndef USE_15HZ
+                .pck_div = 3,
+#else
+                .pck_div = 6,
+#endif
+                .lcd_clk_src = OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,
+            },
+            .dispc_fclk_src = OMAP_DSS_CLK_SRC_FCK,
+        },
+
+        .dsi = {
+#ifndef USE_15HZ
+	    .regn = 16,		// Fint = 2.4 MHz
+            .regm = 180,	// DDR clock = 216 MHz
+            .regm_dispc = 5,	// PLL1_CLK1 = 172.8 MHz
+            .regm_dsi = 5,	// PLL1_CLK2 = 172.8 MHz
+            .lp_clk_div = 10,	// LP Clock = 8.64 MHz
+#else
+            .regn = 16,		// Fint = 2.4 MHz
+            .regm = 90,		// DDR clock = 108 MHz
+            .regm_dispc = 5,	// PLL1_CLK1 = 86.4 MHz
+            .regm_dsi = 5,	// PLL1_CLK2 = 86.4 MHz
+            .lp_clk_div = 5,	// LP Clock = 8.64 MHz
+#endif
+            .dsi_fclk_src = OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI
+        },
+    },
+
+    .panel = {
+        .width_in_um = 57960,
+        .height_in_um = 103040,
+    },
+
+    .channel = OMAP_DSS_CHANNEL_LCD,
+};
+
 static int omap4_tonka_is_dev(void)
 {
 	return gpio_get_value(GPIO_BOARD_ID4);
@@ -686,6 +746,16 @@
 	.default_device	= &omap4_panda_fpga_dsi_device,
 };
 
+static struct omap_dss_device *omap4_panda_fpga_ff_dss_devices[] = {
+	&omap4_panda_fpga_ff_dsi_device,
+};
+
+static struct omap_dss_board_info omap4_panda_fpga_ff_dss_data = {
+	.num_devices	= ARRAY_SIZE(omap4_panda_fpga_ff_dss_devices),
+	.devices	= omap4_panda_fpga_ff_dss_devices,
+	.default_device	= &omap4_panda_fpga_ff_dsi_device,
+};
+
 static struct gpio panda_dss_gpios[] __initdata = {
 	{ GPIO_HDMI_SELECT,	GPIOF_IN,	      "hdmi_select"  },
 	{ GPIO_DISPLAY_MUX,	GPIOF_IN,	      "display_mux" },
@@ -713,7 +783,7 @@
 				omap_display_init(&omap4_panda_fpga_dss_data);
 		}
 	} else {
-		omap_display_init(&omap4_panda_fpga_dss_data);
+		omap_display_init(&omap4_panda_fpga_ff_dss_data);
 	}
 }