| //===-- AMDGPUMCTargetDesc.h - AMDGPU Target Descriptions -----*- C++ -*-===// |
| // |
| // The LLVM Compiler Infrastructure |
| // |
| // This file is distributed under the University of Illinois Open Source |
| // License. See LICENSE.TXT for details. |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| /// \file |
| /// \brief Provides AMDGPU specific target descriptions. |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| |
| #ifndef AMDGPUMCTARGETDESC_H |
| #define AMDGPUMCTARGETDESC_H |
| |
| #include "llvm/ADT/StringRef.h" |
| |
| namespace llvm { |
| class MCAsmBackend; |
| class MCCodeEmitter; |
| class MCContext; |
| class MCInstrInfo; |
| class MCRegisterInfo; |
| class MCSubtargetInfo; |
| class Target; |
| |
| extern Target TheAMDGPUTarget; |
| |
| MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, |
| const MCRegisterInfo &MRI, |
| const MCSubtargetInfo &STI, |
| MCContext &Ctx); |
| |
| MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII, |
| const MCRegisterInfo &MRI, |
| const MCSubtargetInfo &STI, |
| MCContext &Ctx); |
| |
| MCAsmBackend *createAMDGPUAsmBackend(const Target &T, StringRef TT, |
| StringRef CPU); |
| } // End llvm namespace |
| |
| #define GET_REGINFO_ENUM |
| #include "AMDGPUGenRegisterInfo.inc" |
| |
| #define GET_INSTRINFO_ENUM |
| #include "AMDGPUGenInstrInfo.inc" |
| |
| #define GET_SUBTARGETINFO_ENUM |
| #include "AMDGPUGenSubtargetInfo.inc" |
| |
| #endif // AMDGPUMCTARGETDESC_H |